Towards memristor-based approximate accelerator: application to complex-valued FIR filter bank

This paper presents a mixed-signal implementation of complex-valued FIR filter bank using a memristor-based approximate multiplier. First, a memristor-based vector–matrix multiplier was developed for complex number multiplications and then it was extended to perform the convolution operation. Finally, it was utilized for filtering application to study the potential capability of the memristor-based multipliers for accelerating digital signal processing. To evaluate the design, datasets presented by TDFIR kernel of HPEC benchmark suite, which include complex computations, were used. For simulations, Ngspice mixed-signal circuit simulator has been employed as a shared library in C++ programming environment. According to simulation results, using 6-bit accuracy for a 64 × 64 filter bank, the performance can be increased up to ~ 3 GFLOPS while presenting efficiency of ~ 4 GFLOPS/W. The results show that memristor-based mixed-signal architectures can be considered as favorable candidates for accelerating digital signal processing.