FPGA-Based Real-Time Implementation of Detection Algorithm for Automatic Traffic Surveillance Sensor Network

This paper describes the FPGA-based hardware implementation of an algorithm for an automatic traffic surveillance sensor network. The aim of the algorithm is to extract moving vehicles from real-time camera images for the evaluation of traffic parameters, such as the number of vehicles, their direction of movement and their approximate speed, using low power hardware of a sensor network node. A single, stationary, monochrome camera is used, mounted at a location high above the road. Occlusions are not detected, however simple shadow and highlight elimination is performed. The algorithm is designed for frame-rate efficiency and is specially suited for pipelined hardware implementation. The authors, apart from the careful selection of particular steps of the algorithm and the modifications towards parallel implementation, also proposed novel improvements such as backgrounds’ binary mask combination or non-linear functions in highlight detection, resulting in increasing the robustness and efficiency of hardware realization. The algorithm has been implemented in FPGA and tested on real-time video streams from an outdoor camera.