Property analysis of logic Petri nets by marking reachability graphs

被引：0
|
作者：
Yuyue Du
Yuhui Ning
机构：
[1] Shandong University of Science and Technology,College of Information Science and Engineering
来源：
Frontiers of Computer Science | 2014年 / 8卷
关键词：
logic Petri nets; enabled condition; reachable marking graph; fairness; reversibility;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
Logic Petri nets (LPNs) are suitable to describe and analyze batch processing functions and passing value indeterminacy in cooperative systems. To investigate the dynamic properties of LPNs directly, a new method for analyzing LPNs is proposed based on marking reachability graphs in this paper. Enabled conditions of transitions are obtained and a marking reachability graph is constructed. All reachable markings can be obtained based on the graph; the fairness and reversibility of LPNs are analyzed. Moreover, the computing complexity of the enabled conditions and reachable markings can be reduced by this method. The advantages of the proposed method are illustrated by examples and analysis.
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收藏
页码：684 / 692
页数：8
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