A scalability prediction approach for multi-threaded applications on manycore processors

被引:0
|
作者
Xiuxiu Bai
Endong Wang
Xiaoshe Dong
Xingjun Zhang
机构
[1] Xi’an Jiaotong University,School of Electronic and Information Engineering
[2] The State Key Laboratory of High-end Server and Storage Technology,undefined
来源
关键词
Manycore processors; Multi-threaded applications; Scalability prediction; Scalability-aware thread scheduling;
D O I
暂无
中图分类号
学科分类号
摘要
In the manycore era, developing multi-threaded applications to efficiently leverage the increasing number of cores has become an emerging problem. However, each application can have different scalability because of the competition for shared resources, such as CPU cores, memory subsystem, or both, depending on the input set. Therefore, to obtain optimal performance of applications, it is crucial to dynamically predict the scalability of applications and allocate the appropriate number of threads to each application based on its scalability. In this paper, we propose bytes per instruction, which is a simple and effective model to provide insights into the scalability of multi-threaded applications, based on the analysis of the interactions among memory-level parallelism, instruction-level parallelism, and thread-level parallelism. Based on the BPI model, we propose (1) a classification approach and (2) scalability prediction algorithm for multi-threaded applications. Based on the scalability prediction algorithm, we implement the scalability-aware thread scheduling approach which can allocate the appropriate number of threads to optimize application performance. The evaluation results on a 61-core Intel Xeon Phi coprocessor show that our algorithm can predict the scalability of 120-, 180-, and 240-threaded applications with an average error of 6.8 %. Moreover, the accuracy of our prediction algorithm outperforms state-of-the-art instruction-level prediction and memory-level prediction by an average of 9.1  and 14.8 %, respectively. The scalability-aware thread scheduling approach outperforms full utilization by 12.7 %.
引用
收藏
页码:4072 / 4094
页数:22
相关论文
共 50 条
  • [1] A scalability prediction approach for multi-threaded applications on manycore processors
    Bai, Xiuxiu
    Wang, Endong
    Dong, Xiaoshe
    Zhang, Xingjun
    [J]. JOURNAL OF SUPERCOMPUTING, 2015, 71 (11): : 4072 - 4094
  • [2] Branch prediction in multi-threaded processors
    Gummaraju, J
    Franklin, M
    [J]. 2000 INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, PROCEEDINGS, 2000, : 179 - 188
  • [3] Enabling Multi-threaded Applications on Hybrid Shared Memory Manycore Architectures
    Rawat, Tushar
    Shrivastava, Aviral
    [J]. 2015 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2015, : 742 - 747
  • [4] Bottle Graphs: Visualizing Scalability Bottlenecks in Multi-Threaded Applications
    Du Bois, Kristof
    Sartor, Jennifer B.
    Eyerman, Stijn
    Eeckhout, Lieven
    [J]. ACM SIGPLAN NOTICES, 2013, 48 (10) : 355 - 371
  • [5] Performance and energy metrics for multi-threaded applications on DVFS processors
    Rauber, Thomas
    Ruenger, Gudula
    Stachowski, Matthias
    [J]. SUSTAINABLE COMPUTING-INFORMATICS & SYSTEMS, 2018, 17 : 55 - 68
  • [6] Performance Analysis of Multi-threaded Applications in NUMA Multicore Processors
    Fang, Juan
    Fan, Qing-Wen
    Hao, Xiao-Ting
    Cai, Min
    Song, Shu-Ying
    Li, Bin
    [J]. 2015 INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING AND INFORMATION SYSTEM (SEIS 2015), 2015, : 257 - 262
  • [7] Fairness Metrics for Multi-Threaded Processors
    Vandierendonck, Hans
    Seznec, Andre
    [J]. IEEE COMPUTER ARCHITECTURE LETTERS, 2011, 10 (01) : 4 - 7
  • [8] Accurate Traffic Classification with Multi-threaded Processors
    Liu, Yizhen
    Xu, Daxiong
    Sun, Lingge
    Liu, Dong
    [J]. 2008 IEEE INTERNATIONAL SYMPOSIUM ON KNOWLEDGE ACQUISITION AND MODELING WORKSHOP PROCEEDINGS, VOLS 1 AND 2, 2008, : 478 - +
  • [9] Cache Prefetching and Speculation on Multi-Threaded Processors
    Ono, Tarik
    Greenstreet, Mark R.
    [J]. 2013 IEEE PACIFIC RIM CONFERENCE ON COMMUNICATIONS, COMPUTERS AND SIGNAL PROCESSING (PACRIM), 2013, : 206 - 211
  • [10] Partitioning multi-threaded processors with a large number of threads
    El-Moursy, A
    Garg, R
    Albonesi, DH
    Dwarkadas, S
    [J]. ISPASS 2005: IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE, 2005, : 112 - 123