Sigma-Delta ADC on SOI Technology for Working at High Temperatures

被引:1
|
作者
Korotkov A. [1 ]
Morozov D. [1 ]
Pilipko M. [1 ]
Yenuchenko M. [1 ]
机构
[1] Peter the Great Saint Petersburg Polytechnic University, St. Petersburg
关键词
D O I
10.3103/S0735272720110035
中图分类号
学科分类号
摘要
Abstract: We consider the integrated circuit design and the measurement results of test crystals for the 12-bit sigma-delta analog-to-digital converter (ADC) based on 180 nm silicon-on-insulator (SOI) technology from X-FAB. The ADC processes input signals in the frequency range up to 100 kHz in the temperature range of –40…+175 °C with the supply voltage equal to 3.3 V and the modulator clock frequency equal to 10 MHz. The circuit consists of the 5-th order switched-capacitor low-pass pre-filter to limit the input signal spectrum, the cascade connection of the second order sigma-delta modulators, and the digital decimation filter to reduce the clock frequency by 48 times. The main blocks of cutoff filter and modulator are assembled according to the balanced scheme on integrators based on operational transconductance amplifiers with the unity gain bandwidth of 63 MHz. The dynamic element matching circuit is used to expand the dynamic range of converter. It reduces the level of nonlinear distortions in digital-to-analog converters in the feedback circuits of modulator. The value of the SINAD parameter is not worse than 68 dB for converting the signal with the differential amplitude equal to 500 mV at the frequency of 100 kHz. © 2020, Pleiades Publishing, Ltd.
引用
收藏
页码:586 / 595
页数:9
相关论文
共 50 条
  • [1] Design of a high speed cascaded sigma-delta ADC
    Zhou, XF
    Min, H
    Lee, CJ
    [J]. 1996 2ND INTERNATIONAL CONFERENCE ON ASIC, PROCEEDINGS, 1996, : 260 - 262
  • [2] Characterization and Optimization of Sigma-Delta ADC
    Trivedi, Preeti
    Verma, Ajay
    Tripathi, Pritish
    [J]. 2012 Third IEEE and IFIP South Central Asian Himalayas Regional International Conference on Internet (AH-ICI 2012), 2012,
  • [3] A high performance sigma-delta ADC for audio decoder chip
    [J]. Fan, Y. (49645521@qq.com), 1600, Universitas Ahmad Dahlan, Jalan Kapas 9, Semaki, Umbul Harjo,, Yogiakarta, 55165, Indonesia (11):
  • [4] A NEW DESIGN OF OTA FOR SIGMA-DELTA ADC
    Chauhan, Samiksha Singh
    Gamad, R. S.
    [J]. 2015 IEEE UP SECTION CONFERENCE ON ELECTRICAL COMPUTER AND ELECTRONICS (UPCON), 2015,
  • [5] A sigma-delta ADC design automation tool
    Talay, S
    Dündar, G
    [J]. 2005 PhD Research in Microelectronics and Electronics, Vols 1 and 2, Proceedings, 2005, : 40 - 43
  • [6] A multibit sigma-delta ADC for multimode receivers
    Miller, MR
    Petrie, CS
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (03) : 475 - 482
  • [7] Design and Implementation of Sigma-Delta ADC Filter
    Wan, Renzhuo
    Li, Yuandong
    Tian, Chengde
    Yang, Fan
    Deng, Wendi
    Tang, Siyu
    Wang, Jun
    Zhang, Wei
    [J]. ELECTRONICS, 2022, 11 (24)
  • [8] Design of Comparator in Sigma-Delta ADC Using 45 nm CMOS Technology
    Kumar, Varun
    Singh, Krishan Kumar
    Pandey, Abhishek
    Nath, Vijay
    [J]. PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON NANO-ELECTRONICS, CIRCUITS & COMMUNICATION SYSTEMS, 2017, 403 : 381 - 387
  • [9] A 20GSps Broadband Sigma-Delta ADC in InP DHBT Technology
    Wang, Yang
    Liu, Kun
    Han, Chunlin
    Zhang, Youtao
    Li, Xiaopeng
    Yang, Lei
    Guo, Yufeng
    Zhang, Yi
    [J]. 2022 INTERNATIONAL CONFERENCE ON MICROWAVE AND MILLIMETER WAVE TECHNOLOGY (ICMMT), 2022,
  • [10] Digital Filter Design of A High Resolution Audio Sigma-delta ADC
    Huang, Qifeng
    Wan, Peiyuan
    Xie, Xuesong
    Wang, Chuankai
    Su, Limei
    Chen, Zhijie
    [J]. PROCEEDINGS OF 2018 12TH IEEE INTERNATIONAL CONFERENCE ON ANTI-COUNTERFEITING, SECURITY, AND IDENTIFICATION (ASID), 2018, : 208 - 211