Synthesis of reversible circuits with minimal costs

被引：0
|
作者：
Guowu Yang
Xiaoyu Song
William N. N. Hung
Marek A. Perkowski
Chang-Jun Seo
机构：
[1] University of Electronic Science and Technology of China,Dept. of EIRE
[2] Portland State University,undefined
[3] Inje University,undefined
来源：
Calcolo | 2008年 / 45卷
关键词：
Circuits; networks; switching theory; application of Boolean algebra; Boolean function; discrete mathematics in relation to computer science; combinatorics; 94C10; 68R05;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
We present fast algorithms to synthesize exact minimal reversible circuits for various types of gate and cost. By reducing reversible logic synthesis problems to permutation group problems, we use the powerful algebraic software GAP to solve such problems. Our approach can minimize for arbitrary cost functions of gates. In addition, we show that Peres gates are a better choice than the standard Toffoli gates in libraries of universal reversible gates.
引用
收藏
页码：193 / 206
页数：13
相关论文
共 50 条
  • [1] Synthesis of reversible circuits with minimal costs
    Yang, Guowu
    Song, Xiaoyu
    Hung, William N. N.
    Perkowski, Marek A.
    Seo, Chang-Jun
    CALCOLO, 2008, 45 (03) : 193 - 206
  • [2] Synthesis of Reversible Circuits with Minimal Lines for Large Functions
    Soeken, Mathias
    Wille, Robert
    Hilken, Christoph
    Przigoda, Nils
    Drechsler, Rolf
    2012 17TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2012, : 85 - 92
  • [3] Fast synthesis of exact minimal reversible circuits using group theory
    Yang, Guowu
    Song, Xiaoyu
    Hung, William N. N.
    Perkowski, Marek A.
    ASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2005, : 1002 - 1005
  • [4] Synthesis of reversible logic circuits
    Shende, VV
    Prasad, AK
    Markov, IL
    Hayes, JP
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2003, 22 (06) : 710 - 722
  • [5] The Algorithm for Reversible Circuits Synthesis
    Skorupski, Andrzej
    Gracki, Krzysztof
    INTERNATIONAL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS, 2020, 66 (02) : 281 - 286
  • [6] Determining the Minimal Number of Lines for Large Reversible Circuits
    Wille, Robert
    Keszoecze, Oliver
    Drechsler, Rolf
    2011 DESIGN, AUTOMATION & TEST IN EUROPE (DATE), 2011, : 1204 - 1207
  • [7] A Synthesis Flow for Sequential Reversible Circuits
    Soeken, Mathias
    Wille, Robert
    Otterstedt, Christian
    Drechsler, Rolf
    2012 42ND IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL), 2012, : 299 - 304
  • [8] Synthesis of reversible logic for nanoelectronic circuits
    De Vos, Alexis
    Van Rentergem, Yvan
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2007, 35 (03) : 325 - 341
  • [9] Optimal synthesis of linear reversible circuits
    Patel, Ketan N.
    Markov, Igor L.
    Hayes, John P.
    QUANTUM INFORMATION & COMPUTATION, 2008, 8 (3-4) : 282 - 294
  • [10] Optimal synthesis of linear reversible circuits
    EECS Department, University of Michigan, Ann Arbor, MI 48109-2121, United States
    Quantum Inf. Comput., 2008, 3-4 (282-294):
12345