Assuming with Feynman that single atoms can be used as elementary memory cells, this would give a maximum density of information units of the order of 1015 cm-2 for a planar arrangement. If the chemical composition of the surface is fixed and any information change is simply associated with an electronic or conformational change between two possible states of any given surface atom, the above arrangement would result in a maximum information density of just 1 Pbit cm-2 – peta-scale integration (PSI). The manipulation of information on the atomic scale, however, requires the use of macroscopic-scale apparatuses that may, to date, be operated only at a negligible rate. Fundamental quantum mechanical considerations show instead that electrons can be configured with bit densities of the order of 1012 cm-2 (tera-scale integration, TSI); moreover, electron presence or flow can be controlled and sensed by already existing mesoscopic-scale apparatuses in giga-scale integration (GSI). Even though there is no clear method to enable the full exploitation of the performances of such devices, the TSI density is within the reach of the present technology. Rather than scaling down conventional CMOS (complementary metal–oxide–semiconductor) circuits, TSI may almost be achieved via a hybrid architecture where a silicon-based CMOS circuit controls a nanoscopic crossbar structure hosting in each cross-point a collection of functional molecules able to mimic by themselves the behaviour of a memory cell. The hybrid (silicon + molecules) route, however, poses severe problems. The following ones have been identified as the most important: (i) the setting up of an economically sustainable technology for the preparation of cross-points with density higher than 1011 cm-2; (ii) the demultiplexing of the addressing lines to allow their linkage to the CMOS circuit; (iii) the design, synthesis, and electrical characterization of the functional molecules; and (iv) the grafting via batch processing of the functional molecules to the cross-points forming the crossbar. This paper is devoted to discuss the severe challenges posed by the hybrid architecture and to present the solutions that have been found.
