Performance Analysis of Effective Controller for Active Power Filter using PUC5 Inverter for Improving Power Quality

被引:0
|
作者
K. Ananthi
S. Manoharan
机构
[1] Sri Krishna College of Engineering and Technology,Department of Mechatronics Engineering
[2] JCT College of Engineering and Technology,Department of Electrical and Electronics Engineering
关键词
Active Power Filter; PUC5 inverter; Ancillary PI Current Controller; FPGA; Power quality improvement;
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学科分类号
摘要
Active Power Filters (APF) play a significant role in power quality improvement. The multilevel inverter based APF are more advantageous as they are able to produce multi levels in output with less distortion. Packed U Cell is an emerging topology in multilevel inverters. This paper analyses the performance of Ancillary Proportional Integral Current Controlled (APICC) cum Proportional Integral Controller (PIC) and APICC cum Fuzzy Logic Controller (FLC) for APF using Packed U Cell inverter with 5 level output (PUC5) for improving power quality. Usually, the output voltage of an APF needs to be higher than voltage available at the Point of Common Coupling (PCC) to confirm the stepping-up process of the system for injecting the compensating harmonic current into the system meritoriously. In the proposed model, PUC5 inverter has double equally controlled detached DC voltage links whose magnitudes are summed at the input side of the PUC5 inverter for producing a stepping-up voltage which is usually more than the PCC voltage. The controller designs are challenging for the PUC5 inverter. In this article, APICC cum PIC and APICC cum FLC are designed for PUC5 inverter based APF. APICC is selected as an inner current loop that acts as Supply Current shaping loop whereas PIC and FLC are provided as outer loop for regulating the DC link voltage. Reference current needed for the inner current loop inwards indirectly from the outer loop which is one of the major advantages of the proposed model. Sinusoidal PWM technique is employed for generating PWM gate pulse for gate switches of PUC5 inverter. The designed system is verified at different operating regions and loads using APICC cum PIC and APICC cum FLC by developing MATLAB/Simulink simulation and prototype model. The controllers in the prototype are realized in Field Programmable Gate Array (FPGA). The responses of the system are presented to show the proficiency of the proposed model to improve power quality.
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页码:2107 / 2121
页数:14
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