Design of 2.4Ghz CMOS Floating Active Inductor LNA using 130nm Technology

被引：2
|
作者：
Muhamad, M. [1 ,2 ]
Soin, N. [2 ]
Ramiah, H. [2 ]
机构：
[1] Univ Teknol Mara UiTM, Fac Elect Engn, Kuala Lumpur, Malaysia
[2] Univ Malaya, Fac Engn, Kuala Lumpur, Malaysia
来源：
INTERNATIONAL CONFERENCE ON APPLIED ELECTRONIC AND ENGINEERING 2017 (ICAEE2017) | 2018年 / 341卷
关键词：
D O I：
10.1088/1757-899X/341/1/012008
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents about design and optimization of CMOS active inductor integrated circuit. This active inductor implements using Silterra 0.13 mu m technology and simulated using Cadence Virtuoso and Spectre RF. The center frequency for this active inductor is at 2.4 GHz which follow IEEE 802.11 b/g/n standard. To reduce the chip size of silicon, active inductor is used instead of passive inductor at low noise amplifier LNA circuit. This inductor test and analyse by low noise amplifier circuit. Comparison between active with passive inductor based on LNA circuit has been performed. Result shown that the active inductor has significantly reduce the chip size with 73 % area without sacrificing the noise figure and gain of LNA which is the most important criteria in LNA. The best low noise amplifier provides a power gain (S21) of 20.7 dB with noise figure (NF) of 2.1dB.
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页数：7
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