Side channel analysis resistant design flow

被引：9

作者：

Aigner, M. ^{[1
]}

Mangard, S. ^{[1
]}

Menichelli, F. ^{[2
]}

Menicocci, R. ^{[2
]}

Olivieri, M. ^{[2
]}

Popp, T. ^{[1
]}

Scotti, G. ^{[2
]}

Trifiletti, A. ^{[2
]}

机构：

[1] Graz Univ Technol, Inst Appl Informat Processing & Commun, A-8010 Graz, Austria

[2] Univ Roma La Sapienza, Dipartimento Ingn Elettr, Rome, Italy

来源：

2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS | 2006年

关键词：

D O I：

10.1109/ISCAS.2006.1693233

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The threat of side-channel attacks (SCA) is of crucial importance when designing systems with cryptographic hardware or software. The FP6-funded project SCARD(1), enhances the typical micro-chip design flow in order to provide a means for designing side-channel resistant circuits and systems. Appropriate SCA-simulation tools and SCA analysis for the designer of secure systems are part of the project goals. We consider these enhancements for traditional design flows of micro-chips as necessary in order to enable the design for the next generation of secure and dependable devices. SCARD is in its final phase, the final result, a SCARD chip designed by using the developed design flow is currently implemented.

引用

页码：2909 / +

页数：2

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