On the improving of the gate oxide reliability

被引：0

作者：

Bellutti, P ^{[1
]}

Boscardin, M ^{[1
]}

Zen, M ^{[1
]}

Zorzi, N ^{[1
]}

机构：

[1] IRST, Microsensors & Syst Integrat Div, I-38050 Trent, Italy

来源：

PHYSICS AND CHEMISTRY OF SIO(2) AND THE SI-SIO(2) INTERFACE-3, 1996 | 1996年 / 96卷 / 01期

关键词：

D O I：

暂无

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

An improvement of the gate oxide reliability has been obtained using an innovative isolation scheme (DW-LOCOS) in the CMOS sequence fabrication. In particular, the experimental results for the DW-LOCOS samples show that the charge to breakdown of gate oxide is from 5 to 10 times higher than for the conventional CMOS samples. In addition for the DW-LOCOS samples a remarkable weaker dependence of Q(BD) on the stress current polarity has been measured. A possible explanation of this behaviour can be addressed to the quality improvement of the gate oxide layer facing the silicon surface.

引用

页码：635 / 644

页数：10

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