Physical origin and characteristics of gate capacitance in silicon metal-oxide-semiconductor field-effect transistors

The physical origin of gate capacitance in both bulk and silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) is studied. The gate capacitance is theoretically derived as the series capacitance comprising the oxide capacitance, number capacitance (C-N), level capacitance (C-level), and held capacitance (C-field). C-N is in proportion to the thermodynamic density of states under the hypothetical condition that the subband energy levels remain constant when the total electron density is differentiated by the Fermi level. C-level is inversely proportional to the result of differentiating the subband energy level by the total electron density. In the case of bulk MOSFETs or SOI MOSFETs with thick buried oxide, C-field, which originates from the electric field at the edge of the depletion layer, is negligible. In addition to the fact that our new theoretical model corresponds to the intuitive conventional model expressed in terms of the effective thickness of the inversion layer in bulk MOSFETs, it is demonstrated that the conventional capacitance model is also applicable to SOI MOSFETs at 300 K. We have calculated self-consistently the capacitance of a bulk MOSFET and of SOI MOSFETs with various top-silicon layer thicknesses at 300 K. At the fixed total electron density near 10(12) cm(-2), the gate capacitance becomes large with decreasing top-silicon layer thickness. This difference in the gate capacitance mainly comes from C-level, which means that in the case of SOI MOSFETs with a thin top-silicon layer, a small increase in the subband energy level with increasing electron density results in large gate capacitance and high performance of the SOI MOSFETs at 300 K. (C) 1998 American Institute of Physics.