Implementation Aspects of Multi-Level Frame Preemption in TSN

To enable bandwidth-efficient temporal isolation of time critical scheduled traffic, an approach for frame preemption was defined in IEEE 802.3br and 802.1Qbu amendments. However, the proposed solution only offers single-level preemption, which means that low-priority frames can still hinder transmission of other, possibly more important frames. In this paper, we discuss implementation aspects of multi-level frame preemption paradigm, an extension of the original mechanism, aimed at providing an opportunity for frames with firm timing requirements, yet not qualified as scheduled traffic, to benefit from preventing interference caused by low-priority frames. We propose a scalable architecture that is suitable for implementation both on ASIC (Application-Specific Integrated Circuit) and FPGA (Field-Programmable Gate Array) platforms.