Two Methods for 24 Gbps Test Signal Synthesis

被引：0

作者：

Keezer, D. C. ^{[1
]}

Gray, C. E. ^{[1
]}

机构：

[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA

来源：

2011 DESIGN, AUTOMATION & TEST IN EUROPE (DATE) | 2011年

关键词：

multi-Gbps; Test Synthesis; Jitter; ATE;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes and compares two methods for producing digital test signals up to 24 Gbps. Prototypes are experimentally characterized to determine signal quality, and the two methods are demonstrated and compared. The residual timing errors are dominated by jitter. Typical random jitter (RJ) is about 1.17ps to 1.4ps (RMS) including system measurement errors for the two methods. Deterministic Jitter (DJ) is between 2.4ps and 8.5ps. Total jitter (TJ) ranges between 18.9ps and 28.2ps at a bit-error-rate BER=10(-12).

引用

页码：579 / 582

页数：4

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