A sub-1-V, 10 ppm/°C, nanopower voltage reference generator

被引:183
|
作者
De Vita, Giuseppe [1 ]
Iannaccone, Giuseppe
机构
[1] Univ Pisa, Pisa, Italy
[2] Delft Univ Technol, Delft, Netherlands
[3] Univ Pisa, Dept Elect Engn, Natl Res Council, Pisa, Italy
关键词
CMOS voltage reference; low power; temperature compensation;
D O I
10.1109/JSSC.2007.899077
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An extreme low power voltage reference generator operating with a supply voltage ranging from 0.9 to 4 V has been implemented in AMS 0.35-mu m CMOS process. The maximum supply current measured at the maximum supply voltage and at 80 degrees C is 70 nA. A temperature coefficient of 10 ppm/degrees C is achieved as the combined effect of 1) a perfect suppression of the temperature dependence of mobility; 2) the compensation of the channel length modulation effect on the temperature coefficient; and 3) the absence of the body effect. The power supply rejection ratio without any filtering capacitor at 100 Hz arid 10 MHz is lower than -53 and -42 dB, respectively. The occupied chip area is 0.045 mm(2).
引用
收藏
页码:1536 / 1542
页数:7
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