Merged CCD/SOI-CMOS technology

被引:1
|
作者
Suntharalingam, V [1 ]
Burke, BE [1 ]
Burns, JA [1 ]
Cooper, MJ [1 ]
Keast, CL [1 ]
机构
[1] MIT, Lincoln Lab, Lexington, MA 02420 USA
关键词
CCD; CMOS; SOI; low-voltage;
D O I
10.1117/12.385466
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
In this paper we describe a new technology which fabricates CCDs and fully depleted silicon on insulator (FDSOI) CMOS circuits on the same 150-mm silicon wafer. We present results from 7.5x7.5-mu m(2) and 15x15-mu m(2)-pixel imagers that are 512x512 frame transfer devices. The 7.5-mu m-pixel device exhibits a charge handling capacity in excess of 100,000 electrons at 3.3 V and the 15-mu m-pixel device exhibits a charge-transfer efficiency over 99.998%. In addition, we demonstrate functional SOI CMOS ring oscillators with delay of 47 ps/stage at 3.3 V and 68 ps/stage at 2 V.
引用
收藏
页码:246 / 253
页数:8
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