DESIGN OF A COMPLEMENTARY FOLDED-CASCODE OPERATIONAL AMPLIFIER

被引:5
|
作者
Lipka, B. [1 ]
Kleine, U. [1 ]
Scheytt, J. -C. [2 ]
Schmalz, K. [2 ]
机构
[1] Otto VonGuericke Univ Magdegurg, FEIT IESK, D-39016 Magdeburg, Germany
[2] IHP GmbH, Circuit Design, Frankfurt, Germany
关键词
D O I
10.1109/SOCCON.2009.5398081
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The design of a complementary folded-cascode operational amplifier with rail-to-rail input range for low voltage operation is described. Due to the biasing transistors M-16 and M-19 the output swing is increased. By using the ALADIN tool [5-7] the layout has been created automatically. Prototype circuits have been fabricated with a 0.25 mu m CMOS technology and the measurements of the amplifier are presented.
引用
收藏
页码:111 / +
页数:2
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