Implementing fair queueing in ATM switches: The discrete-rate approach

The total, implementation cost of schedulers which approximate the Generalized Processor Sharing (GPS) policy is dominated by the complexity of maintaining and sorting the timestamps for all connections. Several approaches have been proposed which reduce the cast of the sorting operation and only introduce a small degradation in the delay bounds of the scheduler; they include logarithmic calendar queues, which reduce complexity by increasing the granularity of the sorting in an optimal way, and schedulers supporting a discrete set of guaranteed rates, which use a FIFO queue per rate and only require sorting a single timestamp per rate. All these techniques still require computing and storing one timestamp per connection; thus maintaining the cost of GPS-related algorithms clearly higher than that of less sophisticated schedulers. Furthermore, in the case of the discrete-rate approach, the complexity increases linearly with the number of supported rates, thus making it attractive only for relatively small numbers of rates. In this paper, we introduce a discrete-rate GPS-related scheduler which does not require the computation and storage of one timestamp per connection, and only maintains a single timestamp per rate. The elimination of the per-connection timestamps has no negative effect on the delay bounds. Then, we present a generalized discrete-rate approach, which uses a given number of FIFO queues to support a larger number of guaranteed rates, and only introduces a modest degradation in delay bounds for certain rates. The technique can be applied to our no-per-connection-timestamp scheduler, as well as to any discrete-rate scheduler.