A CMOS direct-conversion transceiver for IEEE 802.11a/b/g WLANs

被引：9

作者：

Zhang, PF ^{[1
]}

Der, L ^{[1
]}

Guo, DW ^{[1
]}

Sever, I ^{[1
]}

Bourdi, T ^{[1
]}

Lam, C ^{[1
]}

Zolfaghari, A ^{[1
]}

Chen, J ^{[1
]}

Gambetta, D ^{[1
]}

Cheng, BH ^{[1
]}

Gower, S ^{[1
]}

Hart, S ^{[1
]}

Huynh, L ^{[1
]}

Nguyen, T ^{[1
]}

Razavi, B ^{[1
]}

机构：

[1] RF Micro Devices, San Jose, CA USA

来源：

PROCEEDINGS OF THE IEEE 2004 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2004年

关键词：

D O I：

10.1109/CICC.2004.1358835

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a single chip dual-band transceiver fully compliant with the IEEE 802.11a/b/g standards. Operating in the frequency ranges of 2.412 - 2.484 GHz and 4.92 - 5.805 GHz (including the Japanese band), the fractional-N PLL based frequency synthesizer achieves an integrated (10 KHz 10 MHz) phase noise of 0.54degrees/1.1degrees for 2/5-GRz band. The transmitter error-vector-magnitude (EVM) is -36/-33 dB with an output power level higher than -3/-5 dBm and the receiver sensitivity is better than -70 dBm for 2/5-GRz band for 64QAM at 54 Mb/s.

引用

页码：409 / 412

页数：4

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