Cost Effective Wafer Level Chip Size Package Technology and Application to the Next Generation Automotive Radar

被引:0
|
作者
Tsukashima, K. [1 ]
Kubota, M. [1 ]
Baba, O. [1 ]
Tango, H. [1 ]
Yonamine, A. [1 ]
Tokumitsu, T. [1 ]
Hasegawa, Y. [1 ]
机构
[1] Sumitomo Elect Ind Ltd, Sakae Ku, 1 Taya Cho, Yokohama, Kanagawa 2448588, Japan
关键词
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Cost effective 77GHz transmitter and receiver MMIC's, that use a three-dimensional MMIC technology optimized for flip-chip implementation, are presented. The MMIC structure incorporates inverse TFMS lines so that a ground metal can be applied to cover the whole chip surface except for interconnect pads. Four metal layers including the ground metal are formed between and the top surface of polyimide layers each of which is SiN coated for humidity proof. Hence, these MMIC chips require no package, as well as can be directly assembled on printed circuit board. The transmitter MMIC is composed of an x8 multiplier chain (9.5GHz/38GHz MLT, 38GHz AMP, and 38GHz/76GHz MLT), and a driver+power amplifier. A saturated output power of 14dBm has been obtained between 76 and 77GHz from this transmitter MMIC. A portion of the 38GHz amplifier output is split for the receiver mixer. The receiver MMIC is composed of multi LNA+MIX blocks and a common x2 multiplier block that provides a 10dBm of LO power. A receiver gain of 10dB and a noise figure of 7.8dB for a baseband frequency at 10MHz were obtained. The die size of the transmitter is 1.5mm x 2.0mm and the chip area of the receiver is 1.9mm x 1.3mm.
引用
收藏
页码:280 / 283
页数:4
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