An evolvable hardware FPGA for adaptive hardware

Can we realise the opportunities that lie in design by evolution by using traditional technologies or are there better technologies which will allow us to fully realise the potential inherent in evolvable hardware? In this paper we consider the characteristics of evolvable hardware - especially for adaptive design, and discuss the demands that these characteristics place on the underlying technology, We suggest a potential alternative to today's FPGA technology. The proposed architecture is particularly focused at reducing the genotype required for a given design by reducing the configuration data required for unused routing resources and allowing partial configuration down to a single CLB, In addition, to support adaptive hardware, self-reconfiguration is enabled.