Evaluation of AMD's Advanced Synchronization Facility Within a Complete Transactional Memory Stack

被引：0

作者：

Christie, Dave ^{[1
]}

Chung, Jae-Woong ^{[1
]}

Diestelhorst, Stephan ^{[1
]}

Hohmuth, Michael ^{[1
]}

Pohlack, Martin ^{[1
]}

Fetzer, Christof

Nowack, Martin

Riegel, Torvald

Felber, Pascal

Marlier, Patrick

Riviere, Etienne

机构：

[1] Adv Micro Devices Inc, Sunnyvale, CA 94088 USA

来源：

EUROSYS'10: PROCEEDINGS OF THE EUROSYS 2010 CONFERENCE | 2010年

关键词：

Transactional Memory;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

AMD's Advanced Synchronization Facility (ASF) is an x86 instruction set extension proposal intended to simplify and speed up the synchronization of concurrent programs. In this paper, we report our experiences using ASF for implementing transactional memory. We have extended a C/C++ compiler to support language-level transactions and generate code that takes advantage of ASF. We use a software fall-back mechanism for transactions that cannot be committed within ASF (e. g., because of hardware capacity limitations). Our evaluation uses a cycle-accurate x86 simulator that we have extended with ASF support. Building a complete ASF-based software stack allows us to evaluate the performance gains that a user-level program can obtain from ASF. Our measurements on a wide range of benchmarks indicate that the overheads traditionally associated with software transactional memories can be significantly reduced with the help of ASF.

引用

页码：27 / 40

页数：14

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