A mechanism of increase in the on-current and offcurrent due to a slightly smaller spacer in state-of-the-art p-channel MOS transistors during manufacturing

被引：0

作者：

Lau, W. S. ^{[1
]}

Eng, C. W. ^{[1
]}

Tee, K. M. ^{[1
]}

Siah, S. Y. ^{[1
]}

Vigar, D. ^{[1
]}

Kim, Y. T. ^{[1
]}

Lal, Manni ^{[1
]}

Bhat, Mousumi ^{[1
]}

Chan, L. ^{[1
]}

机构：

[1] Nanyang Technol Univ, Div Microelect, Sch Elect & Elect Engn, Singapore 639798, Singapore

来源：

2005 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, PROCEEDINGS | 2005年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Our observation is that both the on-current and off-current of state-of-the-art p-channel MOS transistors tend to become larger when the spacer becomes smaller. In this paper, we propose 2 mechanisms involved in this on-current and off-current increase due to a slightly smaller spacer. Mechanism A is a decrease in the effective channel length. Because of a TED/BED (transient enhanced diffusion/boron enhanced diffusion) mechanism, the deep p-type D/S implant closer to the channel region makes the p-type D/S extension implant to diffuse farther into the channel region, resulting in a smaller effective channel length L(eff). Mechanism B is a decrease in the series resistance. The deep p-type D/S implant moving closer into the channel region also causes a reduction in the D/S series resistance R(series). The smaller L(eff) and R(series) together can produce a higher on-current. The smaller L(eff) also causes a significant increase in off-current.

引用

页码：777 / 780

页数：4