Steps Toward Automated Deprocessing of Integrated Circuits

Deprocessing of ICs historically employs a variety of mechanical and chemical process tools in combination with one or more imaging modalities to reconstruct the IC architecture. In this work, we explore the development of an extensible programmatic workflow which can take advantage of evolving technologies in 2D/3D imaging, distributed instrument control, image processing, as well as automated mechanical/chemical deprocessing technology. Initial studies involve automated backside mechanical ultra-thinning of 65nm node 3.0 cm(2) Opteron IC processor chips in combination with automated montage SEM imaging and lab-based x-ray tomography and microanalysis. Areas as large as 800umX800um were deprocessed using gas-assisted plasma FIB delayering. Ultra thinning the silicon substrate in the packaged device within 1-2um of the IC device significantly reduces the amount of time required for deprocessing. The computer aided backside ultra thinning approach not only improves the success rate, as compared to manual techniques, it also allows the dense lower layers with smallest feature size to be imaged via high resolution SEM first, while the sample layers are the most uniform. Backside deprocessing has the additional advantage that it can be possible to access the device while keeping it "alive" for in-situ electrical testing. Ongoing work involves enhancing the deprocessing workflow with "intelligent automation" by bridging FIB-SEM instrument control and near real-time data analysis to establish a computationally guided microscopy suite. As described in the text, a common python scripting API architecture between the FIB-SEM platform and the image processing and microanalysis platforms permit rapid development of customized programmatic instrument control with data process integration and feedback. Current studies use smartcards as an archetype to develop automated workflows. Smartcards represent a good architecture to discuss and develop these methods because they are as much as sixteen times smaller area than a 1 cm2 processor and typically containing far few layers. Yet these small form factor embedded integrated circuits have rapidly become a widespread element of modern society and their security architecture represents an important problem. We demonstrate for the first time; tomographic reconstruction based upon automated back-side ultra-thinning coupled to automated gas-assisted plasma FIB delayering.