Using system generator to design a hardware implementation of a fault-tolerant control of induction motor for electrical vehicle

被引:0
|
作者
Souha, B. [1 ]
Soufien, G. [1 ]
Mtibaa, A. [1 ]
机构
[1] Univ Monastir, Fac Sci, Lab Elect & Microelect, Monastir, Tunisia
来源
JOURNAL OF ENGINEERING RESEARCH | 2018年 / 6卷 / 02期
关键词
FPGA; fault tolerant control; induction motor; XSG; DRIVE;
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this paper, a design method of Active Fault Tolerant Control (AFTC) of an Induction Machine (IM) is proposed. AFTC ensures continuous operation of IM in case of faulty current sensor. The proposed system is illustrated using two controls. Direct Torque Control based Space Vector Modulated (DTC-SVM) is used when the system is operating in healthy mode; the adopted DTC-SVM requires the use of three current sensors. Speed Control with Slip Regulation (SCSR) is used when the system is operating in failed mode; the adopted SCSR does not require any current sensors. Using a microcontroller or a Digital Signal Processor, the implemented algorithm suffers from a calculating delay. Therefore, to solve this difficulty, Field Programmable Gate Array (FPGA) is required, owing to its fast processing speed. Several new design flows and tools are developed to implement an algorithm on FPGA, such as Xilinx System Generator (XSG). XSG is a high-level block-based design tool that offers bit and cycle accurate simulation. This tool can automatically generate the Very High-Density Logic (VHDL) code without resorting to a tough programming, without being obliged to do approximations, and, furthermore, we can visualize the behavior of the machine before implementation.
引用
收藏
页码:138 / 154
页数:17
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