共 50 条
- [1] Quantum Boolean circuits construction using tabulation method [J]. 2004 4TH IEEE CONFERENCE ON NANOTECHNOLOGY, 2004, : 596 - 598
- [2] The Shortest Path Method for Quantum Boolean Circuits Construction [J]. 2013 13TH IEEE CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO), 2013, : 221 - 224
- [3] An efficient verification of quantum circuits under a practical restriction [J]. 2008 IEEE 8TH INTERNATIONAL CONFERENCE ON COMPUTER AND INFORMATION TECHNOLOGY, VOLS 1 AND 2, 2008, : 873 - +
- [7] Towards Large-scale Functional Verification of Universal Quantum Circuits [J]. ELECTRONIC PROCEEDINGS IN THEORETICAL COMPUTER SCIENCE, 2019, (287): : 1 - 21
- [8] Hierarchical Verification of Quantum Circuits [J]. NASA FORMAL METHODS, NFM 2016, 2016, 9690 : 344 - 352
- [10] Quantum Boolean circuits are 1-testable [J]. IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2008, 7 (04) : 484 - 492