Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability

被引:103
|
作者
Sen, Bibhash [1 ]
Dutta, Manojit [1 ]
Goswami, Mrinal [1 ]
Sikdar, Biplab K. [2 ]
机构
[1] Natl Inst Technol, Dept Comp Sci & Engn, Durgapur, India
[2] Indian Inst Engn Sci & Technol, Dept Comp Sci & Technol, Sibpur, India
关键词
Quantum-dot cellular automata (QCA); Multiplexer; Reversible logic; Reversible arithmetic logic unit (RALU); Testing RALU; CELLULAR-AUTOMATA;
D O I
10.1016/j.mejo.2014.08.012
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The quantum-dot cellular automata have emerged as one of the potential computational fabrics for the emerging nanocomputing systems due to their ultra-high speed and integration density. On the other hand, reversible computing promises low power consuming circuits by nullifying the energy dissipation during the computation. This work targets the design of a reversible arithmetic logic unit (RALU) in the quantum-dot cellular automata (QCA) framework. The design is based on the reversible multiplexer (RM) synthesized by compact 2:1 QCA multiplexers introduced in this paper. The proposed reversible multiplexer is able to achieve 100% fault tolerance in the presence of single missing or additional cell detects in QCA layout. Furthermore, the advantage of modular design of reversible multiplexer is shown by its application in synthesizing the RALU with separate reversible arithmetic unit (RAU) and reversible logic unit (RLU). The RALU circuit can be tested for classical unidirectional stuck-at faults using the constant variable used in this design. The experimentation establishes that the proposed RALU outperforms the conventional reversible ALU in terms of programming flexibility and testability. (C) 2014 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1522 / 1532
页数:11
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