Electrical Characteristics of SiO2/4H-SiC Metal-oxide-semiconductor Capacitors with Low-temperature Atomic Layer Deposited SiO2

被引:5
|
作者
Jo, Yoo Jin [1 ]
Moon, Jeong Hyun [2 ]
Seok, Ogyun [2 ]
Bahng, Wook [2 ]
Park, Tae Joo [1 ,3 ]
Ha, Min-Woo [4 ]
机构
[1] Hanyang Univ, Dept Adv Mat Engn, Ansan 15588, South Korea
[2] Korea Electrotechnol Res Inst, Power Semicond Res Ctr, High Voltage Direct Current Res Div, Chang Won 51543, South Korea
[3] Hanyang Univ, Dept Mat Sci & Chem Engn, Ansan 15588, South Korea
[4] Myongji Univ, Dept Elect Engn, Yongin 17058, South Korea
关键词
C-V; effective oxide charge density; gate leakage current; hysteresis; MOS; SiC; SiO2; OXIDATION;
D O I
10.5573/JSTS.2017.17.2.265
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
4H-SiC has attracted attention for highpower and high-temperature metal-oxide-semicon-ductor field-effect transistors (MOSFETs) for industrial and automotive applications. The gate oxide in the 4H-SiC MOS system is important for switching operations. Above 1000 degrees C, thermal oxidation initiates SiO2 layer formation on SiC; this is one advantage of 4H-SiC compared with other wide band-gap materials. However, if post-deposition annealing is not applied, thermally grown SiO2 on 4H-SiC is limited by high oxide charges due to carbon clusters at the SiC/SiO2 interface and near-interface states in SiO2; this can be resolved via lowtemperature deposition. In this study, lowtemperature SiO2 deposition on a Si substrate was optimized for SiO2/4H-SiC MOS capacitor fabrication; oxide formation proceeded without the need for post-deposition annealing. The SiO2/4H-SiC MOS capacitor samples demonstrated stable capacitance-voltage (C-V) characteristics, low voltage hysteresis, and a high breakdown field. Optimization of the treatment process is expected to further decrease the effective oxide charge density.
引用
收藏
页码:265 / 270
页数:6
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