Real-time Implementation of the ViBe Foreground Object Segmentation Algorithm

被引:0
|
作者
Kryjak, Tomasz [1 ]
Gorgon, Marek [1 ]
机构
[1] AGH Univ Sci & Technol, Krakow, Poland
关键词
FPGA;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a novel real-time hardware implementation of the Vile (Visual Background Extractor) background generation algorithm in reconfigurable FPGA device. This novel method combines the advantages of typical recursive and non-recursive approaches and achieves very good foreground object segmentation results. In this work the issue of porting ViBe to a FPGA hardware platform is discussed, two modification to the original approach are proposed and a detailed description of the implemented system is presented. This is the first, known to the authors, FPGA implementation of this algorithm.
引用
收藏
页码:591 / 596
页数:6
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