An FPGA Accelerator for Hash Tree Generation in the Merkle Signature Scheme

Merkle Signature Scheme relies on secure hash functions and is, therefore, assumed to be resistant to attacks by quantum computers. The generation of the Merkle public key, however, is highly time-consuming because of the huge number of hash operations required to set up a complete hash tree. Fortunately, setting up such trees features inherent parallelism, which may be utilized for accelerating this process using a specific hardware platform. This paper presents a flexible and efficient hardware architecture on an FPGA platform to accelerate the generation of Merkle hash trees. Timing measurements on a prototype with different parameters show a considerable performance boost compared to a. similar software solution.