A low-voltage CMOS linear transconductor suitable for analog multiplier application

被引：0
|
作者：
Sawigun, Chutham [1 ]
Mahattanakul, Jirayuth [1 ]
机构：
[1] Mahanakorn Univ Technol, Fac Engn, Dept Elect Engn, Bangkok, Thailand
来源：
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS | 2006年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Based on a previously reported low voltage class-AB CMOS linear transconductor, we propose a simple technique to modify such a circuit so that its transconductance gain is linearly dependent on external voltage. The applicability of the resulting transconductor in low voltage low power four quadrant analog multiplication is then presented. PSPICE simulation results of both the proposed transconductor and multiplier are given.
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页码：1543 / +
页数：2
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