A Guided Tour of Electronic Design Automation (EDA) for Design of Silicon on Insulator (SOI) SoCs

被引:0
|
作者
Kranen, Kevin [1 ]
机构
[1] Synopsys Inc, Foundry & IP Alliances Program, Mountain View, CA 94043 USA
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中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The design of SOI-based SoCs has traditionally been the province of a few companies that could afford very labor-intensive custom design approaches - microprocessor companies looking for performance or aerospace companies looking for rad-hard electronics. In recent years, SOI has become a more attractive option for SoC design teams that have traditionally targeted bulk silicon. With current improvements in SOI substrates, processes, devices, design IP and EDA tools, SoC design in SOI can look and feel essentially the same as design in bulk silicon. Designers can use the same familiar EDA tools and flows for bulk silicon, while achieving better performance and power results that are the hallmark of SOL.
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页码:7 / 8
页数:2
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