A Survey on Performance of On-Chip Cache for Multi-core Architectures

Embedded devices are playing a vital role in today's day-today life. The devices like mobile, washing machine, microwave may be considered as a result of advancement in embedded systems. There are design limitations on processor area and energy consumption of embedded processors. Energy consumption will be considered as one of the important parameters in performance enhancement of embedded processor. The energy drawn by on-chip cache has an identifiable share in the total energy supplied to the processor. This paper presents a survey of different techniques to improve the energy consumption. The parameters considered in survey are dynamic energy, area, throughput, performance, lifetime, harmonic mean instruction per cycle, miss rate and latency. This survey has identified the need of an energy efficient technique with respect to the writes.