Delay Analysis and Design Exploration for 3D SRAM

被引：0

作者：

Chen, Xi ^{[1
]}

Davis, W. Rhett ^{[1
]}

机构：

[1] N Carolina State Univ, Dept Elect & Comp Engn, Raleigh, NC 27695 USA

来源：

2009 IEEE INTERNATIONAL CONFERENCE ON 3D SYSTEMS INTEGRATION | 2009年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The emerging three-dimension (3D) integration technology provides a solution to reduce delay in SRAM. In this paper, we present a physical based delay analysis approach to explore 3D SRAM design options. Our analysis can be used to optimize the 3D SRAM timing performance at both sub-array and system level. Design examples based on the MITLL 3D process are constructed to demonstrate the trade-offs. As the analysis results show, the optimized 3D sub-array provides up to 20% extra improvement for SRAM access time reduction.

引用

页码：244 / 247

页数：4

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