PCB PDN Prelayout Library for Top-Layer Inductance and the Equivalent Model for Decoupling Capacitors

被引:11
|
作者
Yang, Sichen [1 ]
Cao, Ying S. [2 ]
Ma, Hanzhi [1 ]
Cho, Jonghyun [2 ]
Ruehli, Albert E. [2 ]
Drewniak, James L. [2 ]
Li, Erping [1 ]
机构
[1] Zhejiang Univ, Dept IS & Elect Engn, ZJU UIUC Inst, Hangzhou 310000, Zhejiang, Peoples R China
[2] UMRI, MST EMC Lab, Rolla, MO 65401 USA
基金
中国国家自然科学基金;
关键词
Inductance; partial element equivalent circuit (PEEC); power integrity; printed circuit board power distribution network (PCB PDN); COMPUTATIONAL ELECTROMAGNETICS CEM; SELECTIVE VALIDATION FSV; PEEC METHOD;
D O I
10.1109/TEMC.2017.2768226
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The power distribution network (PDN) of a high-speed printed circuit board requires a high-performance power supply. The total equivalent inductance above the top ground plane is an important part of PDN design and is regarded as L-above. In this paper, an inductance library for different structures of capacitor connections and capacitor sizes has been built, which is essential for PDN design. computer simulation technology (CST) and partial element equivalent circuit method are applied to obtain the shorted pattern design curves at various design data. The shorted pattern design curve means the total equivalent inductance varies with the distance between pad and ground plane. In addition, an approximate shorted model is established for a decoupling capacitor-mounted model, which will be convenient for us to get the inductance of L-above. In this paper, the design curve provides an intuitive guideline in designing PDN and facilitates the industry to choose what they want with consideration of the inductance, space, via numbers, etc.
引用
收藏
页码:1898 / 1906
页数:9
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