High-Performance CMOS Power Amplifier With Improved Envelope Tracking Supply Modulator

被引:35
|
作者
Park, Byungjoon [1 ]
Kim, Dongsu [2 ]
Kim, Seokhyeon [3 ]
Cho, Yunsung [1 ]
Kim, Jooseung [3 ]
Kang, Daehyun
Jin, Sangsu [3 ]
Moon, Kyunghoon [3 ]
Kim, Bumman [3 ]
机构
[1] Pohang Univ Sci & Technol POSTECH, Div Informat Technol Convergence Engn ITCE, Pohang 790784, Gyeongbuk, South Korea
[2] Samsung Syst LSI Business, Yongin 445330, Gyeonggi Do, South Korea
[3] Pohang Univ Sci & Technol POSTECH, Dept Elect Engn, Pohang 790784, Gyeongbuk, South Korea
关键词
CMOS; efficiency; envelope tracking (ET); linear; long-term evolution (LTE); power amplifier (PA); supply modulator; THERMAL DESIGN; EFFICIENCY; HBT;
D O I
10.1109/TMTT.2016.2518659
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A differential cascode CMOS power amplifier (PA) with a supply modulator for envelope tracking (ET) has been implemented using 0.18-mu m RF CMOS technology. For maximizing the PA's performance, the CMOS power cell has been optimized. The CMOS PA employs 2nd harmonic control circuits at the input, source, and output of the PA to improve efficiency and linearity at the same time. The CMOS PA utilizes an improved ET supply modulator, which is suitable for a CMOS PA with high knee voltage. By utilizing this modulator, we achieve not only higher linearity, but also higher efficiency in all power levels. For a long-term evolution signal at 1.70 GHz with a 10-MHz bandwidth and a 16-QAM 7.5-dB peak-to-average power ratio, the CMOS ET PA module achieves a power-added efficiency of 36.6%, an error vector magnitude of 3.0%, and an adjacent channel leakage ratio of -35.6 dBc at an average output power of 28.5 dBm. The proposed ET operation reduces the total current consumption over the standalone PA, by 10% at the peak power and up to 56% at a low power.
引用
收藏
页码:798 / 809
页数:12
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