Tilt angle effect on optimizing HALO PMOS and NMOS performance

Deep submicrometer MOS devices often need special structures to optimize their performance. The HALO structure, or pocket implant, is usually adopted for PMOS to reduce off-state leakage current and enhance on-state drive current. This paper studies the tilt angle effect of HALO implant on device performance. It is found that device with higher tilt angle gives reduced body effect and increased source resistance as compared to those with low tilt angle, and the effect of resistance and body effect compensates each other, resulting equivalent DC performance for different tilt angle. We suggest that based on this equivalence of DC performance, high tilt angle should be adopted for HALO devices due to their lower junction capacitance.