Design Trade-off Between Performance and Fault-Tolerance of Space Onboard Computers

被引：1

作者：

Gorbunov, M. S. ^{[1
,2
]}

Antonov, A. A. ^{[1
]}

机构：

[1] Russian Acad Sci SRISA, Sci Res Inst Syst Anal, Nakhimovsky Prospect 36-1, Moscow 117218, Russia

[2] Natl Res Nucl Univ MEPhI, Moscow Engn Phys Inst, Kashirskoe Highway 31, Moscow, Russia

来源：

INTERNATIONAL CONFERENCE ON PARTICLE PHYSICS AND ASTROPHYSICS | 2017年 / 798卷

基金：

俄罗斯基础研究基金会;

关键词：

D O I：

10.1088/1742-6596/798/1/012189

中图分类号：

P1 [天文学];

学科分类号：

0704 ;

摘要：

It is well known that there is a trade-off between performance and power consumption in onboard computers. The fault-tolerance is another important factor affecting performance, chip area and power consumption. Involving special SRAM cells and error correcting codes is often too expensive with relation to the performance needed. We discuss the possibility of finding the optimal solutions for modern onboard computer for scientific apparatus focusing on multi-level cache memory design.

引用

页数：5

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