An Efficient Self-Routing and Non-Blocking Interconnection Network on Chip

In this paper, we present a new self-routing and non-blocking unicast interconnection network based on binary radix sorting that is more efficient than comparable other interconnection networks. To substantiate this claim, we first derive the asymptotic complexities of the size and depth of our network's circuit netlist. Moreover, we have implemented our network as well as other related radixbased sorting networks using 65nm CMOS chip technology. We compare the maximal frequency, the required chip area, and the power consumption of these circuits. Our evaluation shows that our network is best among the considered radix-based networks regardless whether the maximal frequency, the chip area or the power consumption is considered.