How to derive a quantum complexity lower bound

被引:0
|
作者
Nishino, Tetsuro [1 ]
机构
[1] Univ Electrocommun, Dept Informat & Commun Engn, Chofu, Tokyo 1828585, Japan
关键词
quantum complexity theory; quantum logic circuits; circuit complexity theory; the P=NPquestion;
D O I
10.1002/ecjc.20298
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The modeling of computation using logic circuits occupies an important position in the fundamentals of complexity theory including quantum complexity theory. Consequently, research into methods for computing logic functions on quantum circuits as well as for minimizing and simplifying such circuits has become extremely important. In this paper we explicitly formulate the depth minimization problem for quantum logic circuits and show that this problem is closely related to a geometric approach to deriving a lower bound on the size of a quantum logic circuit. (C) 2007 Wiley Periodicals, Inc.
引用
收藏
页码:9 / 17
页数:9
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