TD-SCDMA/HSDPA Transceiver and Analog Baseband Chipset in 0.18-μm CMOS Process

被引：4

作者：

Li, Zhenbiao ^{[1
]}

Li, Ming ^{[1
]}

Zhao, Dong ^{[1
]}

Ma, Dequn ^{[1
]}

Ni, Wenhai ^{[1
]}

Ouyang, Zhongming ^{[1
]}

机构：

[1] Comlent Commun Inc, Shanghai 201203, Peoples R China

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2010年 / 57卷 / 02期

关键词：

Analog baseband (ABB); CMOS; dual band; high-speed downlink packet access (HSDPA); time-division synchronous code-division multiple access (TD-SCDMA); transceiver (TRX);

D O I：

10.1109/TCSII.2010.2040301

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A dual-band time-division synchronous code-division multiple access chipset supporting 2.8-Mb/s high-speed downlink packet access has been demonstrated in 0.18-mu m CMOS technology. The receiver adjacent channel selectivity requirement for the transceiver is relaxed by utilizing a high-dynamic-range analog-to-digital converter that allows selectivity improvement in analog baseband and digital baseband. The RX chain achieves 2.8-dB noise figure, -9.4-dBm total third-order input-referred intercepted point, and 5.7% error vector magnitude (EVM). TX delivers 5.0-dBm power, 88-dB gain control, and 4.5% EVM. The TX digital communication system band noise floor is 3 dB below the standard without using a surface acoustic wave filter. Both RX and TX from-idle-to-on switching times are less than 4 mu S. Two chips consume 274 and 164 mW on transmitting and receiving, respectively, under a 1.8-V power supply.

引用

页码：90 / 94

页数：5

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