Surface Strained Ge-Cz Wafers By Sn-Implantation For High Electron And Hole Mobility

被引：0

作者：

Borland, John ^{[1
]}

Sugitani, Michiro ^{[2
]}

Chaung, S. S. ^{[3
]}

Lee, Y. J. ^{[3
]}

Huet, Karim ^{[4
]}

Joshi, Abhijeet ^{[5
]}

Wan, Alan ^{[6
]}

Wong, Larry ^{[6
]}

Horvath, Peter ^{[7
]}

Finley, Andrew ^{[7
]}

机构：

[1] JOB Technol, Aiea, HI USA

[2] Sumitomo Heavy Ind Ion Technol, Tokyo, Japan

[3] Natl Nano Device Lab, Hsinchu, Taiwan

[4] LASSE Screen, Gennevilliers, France

[5] Act Layer Parametr, Los Angeles, CA USA

[6] EAG, Santa Clara, CA USA

[7] Semilab, Budapest, Hungary

来源：

2016 21ST INTERNATIONAL CONFERENCE ON ION IMPLANTATION TECHNOLOGY (IIT) | 2016年

关键词：

Ge-epi; Ge-Cz; tensile strain-Ge; Sn implantation; electron mobility; hole mobility; bulk mobility; layer mobility; differential Hall effect;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Ge-epi on Si wafers contain >1E7/cm(2) TDD which degrades junction leakage and potentially also degrade mobility. Therefore we investigated using Ge-Cz wafers as an alternative free of Ge-epi TDD and observed that surface Sn implantation up to 16% can induce surface tensile strain-Ge measured by XRD enhancing top 30nm n-well surface layer mobility (mu e) by 2.5x from 500cm(2)/Vs up to 1250cm(2)/Vs but the surface tensile strain-Ge degraded top 30nm p-well surface layer mobility (mu h) by 73% from 3000cm(2)/Vs to 800cm(2)/Vs and surface bulk mobility by 74% from 1850cm(2)/Vs to 480cm(2)/Vs.

引用

页数：4

共 43 条

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