Full System Simulation and Verification Framework

被引：5
|
作者：
Lin, Jing-Wun [1 ]
Wang, Chen-Chieh [1 ]
Chang, Chin-Yao [1 ]
Chen, Chung-Ho [1 ]
Lee, Kuen-Jong [1 ]
Chu, Yuan-Hua [2 ]
Yeh, Jen-Chieh [2 ]
Hsiao, Ying-Chuan [2 ]
机构：
[1] Natl Cheng Kung Univ, Inst Comp & Commun Engn, Tainan 70101, Taiwan
[2] Ind Technol Res Inst, SoC Technol Ctr, Hsinchu, Taiwan
来源：
FIFTH INTERNATIONAL CONFERENCE ON INFORMATION ASSURANCE AND SECURITY, VOL 1, PROCEEDINGS | 2009年
关键词：
D O I：
10.1109/IAS.2009.253
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
In this paper, we propose it framework to develop high-performance system accelerator hardware and the corresponding software at system-level This framework is designed by integrating it virtual machine. in electronic system level platform. and an enhanced QEMU-SystemC The enhancement Includes a local master interface for fast memory transfer, and in interrupt handling hardware for software/hardware communication that enables full system simulation Finally the PAC DSP core is used as examples to demonstrate the proposed framework for full system simulation
引用
收藏
页码：165 / +
页数：2
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