A 531 nW/MHz, 128x32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity

被引：38

作者：

Chawla, R ^{[1
]}

Bandyopadhyay, A ^{[1
]}

Srinivasan, V ^{[1
]}

Hasler, P ^{[1
]}

机构：

[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA

来源：

PROCEEDINGS OF THE IEEE 2004 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2004年

关键词：

D O I：

10.1109/CICC.2004.1358910

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We present a 12802 four-quadrant programmable current-mode analog vector-matrix multiplier (VMM). The proposed multiplier cell operates on a 3.3V supply, consumes 531nW/MHz and is linear over two decades of current range. Programmability and non-volatile weight storage is obtained by using floating-gate transistors. Experimental results for a full image Discrete Cosine Transform (DCT) using the proposed architecture is presented. The IC prototype was fabricated in a 0.5mum CMOS process and occupies 0.83mm(2) of area.

引用

页码：651 / 654

页数：4