Computation of AB2 multiplier in GF(2m) using efficient low-complexity cellular architecture

被引:0
|
作者
Liu, CH [1 ]
Huang, NF
Lee, CY
机构
[1] Natl Tsing Hua Univ, Dept Comp Sci, Hsinchu 300, Taiwan
[2] Chunghwa Telecom Ltd, Telecom Lab, Tao Yuan 326, Taiwan
关键词
inner product; cyclic shifting; bit-parallel cellular array multipliers; irreducible AOP; canonical basis;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This study presents two new hit-parallel cellular multipliers based on an irreducible all one polynomial (AOP) over the finite field GF(2(m)). Using the property of the AOP. this work also presents an efficient algorithm of inner-product multiplication for computing AB(2) multiplications is proposed, with a structure that can simplify the time and space complexity for hardware implementations. The first structure employs the new inner-product multiplication algorithm to construct the bit-parallel cellular architecture. The designed multiplier only requires the computational delays of (m + 1)(T-AND + T-XOR). The second proposed structure is a modification of the first structure, and it requires (m + 2) T-XOR delays, Moreover, the proposed multipliers can perform A(2i) B-2J computations by shuffling the coefficients to make i and j integers. For the computing multiplication in GF(2m), the novel multipliers turn out to be efficient as they simplify architecture and accelerate computation. The two novel architectures are highly regular, simpler. and have shorter computation delays tl-lan the conventional cellular multipliers.
引用
收藏
页码:2657 / 2663
页数:7
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