A Fourth-Order, Audio-Bandwidth, 87.5-dB SNDR ΣΔ Modulator for MEMS Microphones

被引:0
|
作者
Picolli, L. [1 ]
Grassi, M. [1 ]
Rosson, L. [1 ]
Fornasari, A. [1 ]
Malcovati, P. [1 ]
机构
[1] Univ Pavia, Dept Elect Engn, I-27100 Pavia, Italy
关键词
D O I
10.1109/ISCAS.2009.5118008
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a complete interface circuit for capacitive MEMS microphones, consisting of the cascade of a preamplifier, a second-order, multi-bit analog Sigma Delta modulator, and a fourth-order, single-bit digital Sigma Delta modulator. The complete interface circuit features a current consumption of 574 mu A from a 3.3-V power supply, achieving a signal-to-noise and distortion ratio (SNDR) of 87.5 dB. The feed-forward technique has been used in the analog Sigma Delta modulator, to relax the requirements of the operational amplifiers. The proposed MEMS microphone interface circuit is designed in a 0.35-mu m CMOS technology. Post-layout and Montecarlo simulation results of the overall circuit are reported to validate the performance.
引用
收藏
页码:1325 / 1328
页数:4
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