Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications

被引:0
|
作者
Castro, Marcio [1 ]
Wanderley Goes, Luis Fabricio [2 ]
Fernandes, Luiz Gustavo [3 ]
Mehaut, Jean-Francois [1 ]
机构
[1] Grenoble Univ, LIG Lab, CEA, INRIA,ZIRST 51, Ave Jean Kuntzmann, F-38330 Montbonnot St Martin, France
[2] Pontif Cathol Univ Minas Gerais, Dept Comp Sci, Belo Horizonte, MG, Brazil
[3] PPGCC Pontif Cathol Univ Rio Grande, Porto Alegre, RS, Brazil
来源
关键词
transactional memory; dynamic thread mapping; machine learning; PARALLELISM;
D O I
暂无
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Thread mapping is an appealing approach to efficiently exploit the potential of modern chip-multiprocessors. However, efficient thread mapping relies upon matching the behavior of an application with system characteristics. In particular, Software Transactional Memory (STM) introduces another dimension due to its runtime system support. In this work, we propose a dynamic thread mapping approach to automatically infer a suitable thread mapping strategy for transactional memory applications composed of multiple execution phases with potentially different transactional behavior in each phase. At runtime, it profiles the application at specific periods and consults a decision tree generated by a Machine Learning algorithm to decide if the current thread mapping strategy should be switched to a more adequate one. We implemented this approach in a state-of-the-art STM system, making it transparent to the user. Our results show that the proposed dynamic approach presents performance improvements up to 31% compared to the best static solution.
引用
收藏
页码:465 / 476
页数:12
相关论文
共 50 条
  • [1] Adaptive thread mapping strategies for transactional memory applications
    Castro, Marcio
    Goes, Luis Fabricio W.
    Mehaut, Jean-Francois
    JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 2014, 74 (09) : 2845 - 2859
  • [2] Machine learning-based thread-parallelism regulation in software transactional memory
    Rughetti, Diego
    Di Sanzo, Pierangelo
    Ciciani, Bruno
    Quaglia, Francesco
    JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 2017, 109 : 208 - 229
  • [3] Thread and Data Mapping in Software Transactional Memory: an Overview
    Pasqualin, Douglas Pereira
    Diener, Matthias
    Du Bois, Andre Rauber
    Pilla, Mauricio Lima
    INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING, 2025, 53 (03)
  • [4] Autonomic Parallelism and Thread Mapping Control on Software Transactional Memory
    Zhou, Naweiluo
    Delaval, Gwenael
    Robu, Bogdan
    Rutten, Eric
    Mehaut, Jean-Francois
    2016 IEEE INTERNATIONAL CONFERENCE ON AUTONOMIC COMPUTING (ICAC), 2016, : 189 - 198
  • [5] Online Sharing-Aware Thread Mapping in Software Transactional Memory
    Pasqualin, Douglas Pereira
    Diener, Matthias
    Du Bois, Andre Rauber
    Pilla, Mauricio Lima
    2020 IEEE 32ND INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD 2020), 2020, : 35 - 42
  • [6] Thread-Level Speculation Based on Transactional Memory
    Li, Xiang
    Zhang, Jing
    INFORMATION-AN INTERNATIONAL INTERDISCIPLINARY JOURNAL, 2012, 15 (04): : 1745 - 1755
  • [7] Dynamic thread mapping of shared memory applications by exploiting cache coherence protocols
    Cruz, Eduardo H. M.
    Diener, Matthias
    Alves, Marco A. Z.
    Navaux, Philippe O. A.
    JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 2014, 74 (03) : 2215 - 2228
  • [8] Thread-Safe Dynamic Binary Translation using Transactional Memory
    Chung, JaeWoong
    Dalton, Michael
    Kannan, Hari
    Kozyrakis, Christos
    2008 IEEE 14TH INTERNATIONAL SYMPOSIUM ON HIGH PEFORMANCE COMPUTER ARCHITECTURE, 2008, : 256 - 266
  • [9] Survey of machine learning application in transactional memory
    Vurdelja, Igor
    Sustran, Zivojin
    Protic, Jelica
    Draskovic, Drazen
    2020 28TH TELECOMMUNICATIONS FORUM (TELFOR), 2020, : 363 - 366
  • [10] Thread Affinity in Software Transactional Memory
    Pasqualin, Douglas Pereira
    Diener, Matthias
    Du Bois, Andre Rauber
    Pilla, Mauricio Lima
    2020 19TH INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED COMPUTING (ISPDC 2020), 2020, : 180 - 187