Resistorless self-biased curvature compensated sub-1V CMOS bandgap reference

被引:0
|
作者
Jaafar, Khairuddin [1 ]
Kamal, Noorfazila [1 ]
Reaz, Mamun Bin Ibne [1 ]
Sampe, Jahariah [2 ]
机构
[1] Univ Kebangsaan Malaysia, Dept Elect Elect & Syst Engn, Bangi, Malaysia
[2] Univ Kebangsaan Malaysia, Inst Microengn & Nanoelect, Bangi, Malaysia
关键词
sub-1V CMOS bandgap reference; curvature compensated; temperature stability; voltage supply stability; resistorless; self-biased op-amp;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
A Bandgap Voltage Reference (BGR) circuit technique for lower voltage supply operation is presented. It eliminates the need of BGR core and resistors by integrating a two-stage cascode operational amplifier (op-amp) biased with a start-up circuitry with all-MOSFET transistors. The circuit is designed in 0.13 mu m CMOS process technology, produced a 179mV reference voltage at 27 degrees C with 0.4V supply voltage. The simulated voltage reference achieved 0.02ppm/degrees C temperature coefficient over -60 degrees C to 45 degrees C temperature range as well as +/- 170mV over supply voltage variation from 0.1V to 1.2V. The design is simulated and verified with Mentor Graphics.
引用
收藏
页码:309 / 312
页数:4
相关论文
共 50 条
  • [1] Generating sub-1V reference voltages from a resistorless CMOS bandgap reference circuit by using a piecewise curvature temperature compensation technique
    Tam, Wing-Shan
    Wong, Oi-Ying
    Kok, Chi-Wah
    Wong, Hei
    [J]. MICROELECTRONICS RELIABILITY, 2010, 50 (08) : 1054 - 1061
  • [2] 0.75 V supply nanowatt resistorless sub-bandgap curvature-compensated CMOS voltage reference
    Gomez Caicedo, Jhon Alexander
    Mattia, Oscar E.
    Klimach, Hamilton
    Bampi, Sergio
    [J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2016, 88 (02) : 333 - 345
  • [3] 0.75 V supply nanowatt resistorless sub-bandgap curvature-compensated CMOS voltage reference
    Jhon Alexander Gomez Caicedo
    Oscar E. Mattia
    Hamilton Klimach
    Sergio Bampi
    [J]. Analog Integrated Circuits and Signal Processing, 2016, 88 : 333 - 345
  • [4] A Sub-1V CMOS Bandgap Reference with High-order Curvature Compensation
    Liu, Zhidong
    Cheng, Yuhua
    [J]. 2009 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC 2009), 2009, : 441 - 444
  • [5] A novel sub-1V bandgap reference with offset compensated techniques
    Zhang, Yun-wu
    Zhu, Jing
    Sun, Wei-feng
    Sun, Guodong
    Lu, Sheng-li
    [J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2014, 78 (02) : 391 - 397
  • [6] A novel sub-1V bandgap reference with offset compensated techniques
    Yun-wu Zhang
    Jing Zhu
    Wei-feng Sun
    Guodong Sun
    Sheng-li Lu
    [J]. Analog Integrated Circuits and Signal Processing, 2014, 78 : 391 - 397
  • [7] Curvature compensated CMOS bandgap with sub 1V supply
    Tom, K
    Alvandpour, A
    [J]. DELTA 2006: THIRD IEEE INTERNATIONAL WORKSHOP ON ELECTRONIC DESIGN, TEST AND APPLICATIONS, 2006, : 93 - +
  • [8] A sub-1V 78-nA bandgap reference with curvature compensation
    Luo, Ziyang
    Lu, Yan
    Huang, Mo
    Jiang, Junmin
    Sin, Sai-Weng
    Seng-Pan, U.
    Martins, Rui P.
    [J]. MICROELECTRONICS JOURNAL, 2017, 63 : 35 - 40
  • [9] A Sub-1V Full CMOS Bandgap Voltage Reference with a Body Bias
    Park, Chang-Bum
    An, Kyung-Chan
    Lim, Shin-Il
    [J]. JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2017, 17 (05) : 621 - 626
  • [10] A sub-1V Bandgap Reference with area reduction
    Kim, Donggyun
    Jeong, Sanghun
    Jo, Sejin
    Park, Kichul
    Cho, Seongik
    [J]. CISST'10: PROCEEDINGS OF THE 4TH WSEAS INTERNATIONAL CONFERENCE ON CIRCUITS, SYSTEMS, SIGNAL AND TELECOMMUNICATIONS, 2009, : 163 - 166