A 10Gbps/channel on-chip signaling circuit with an impedance-unmatched CML driver in 90nm CMOS technology

被引：0
|
作者：
Kuboki, Takeshi [1 ]
Tsuchiya, Akira [1 ]
Onodera, Hidetoshi [1 ]
机构：
[1] Kyoto Univ, Dept Commun & Comp Engn, Kyoto, Japan
来源：
PROCEEDINGS OF THE ASP-DAC 2007 | 2007年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
An on-chip signaling system consists of a CML driver, a differential transmission-line and a CML receiver is fabricated. We developed an impedance-unmatched driver for power reduction. The impedance-unmatched driver reduces the tail current of the CML buffer by tuning the load resistance. The designed circuit achieves 3mm, 10Gbps/channel on-chip signal transmission and the impedance-unmatched driver saves the energy per bit by 21% compared with a conventional impedance-matched driver.
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页码：120 / +
页数：2
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