An efficient accelerating architecture for tier-1 coding in JPEG2000

In this paper, we propose an efficient accelerating architecture for tier-1 coding in JPEG2000. The coding-passes-parallel method is introduced in our architecture to accelerate the encoding. A novel architecture named the scan-window is employed in our architecture to make it convenient to encode three coding passes in the parallel mode. Therefore, three coding passes can be encoded using one time of bit-plane scan in Our architecture. The processing time can be reduced by more than 70% compared to the traditional serial coding passes processing architecture. Additionally, a pipelined architecture for MQ coder is proposed to improve the throughout. The architecture has been implemented in SMIC 0.18um CMOS technology.